Herzog Library 00.00.01  rel_libdev.herzog.00.00.01.10606
Data Fields
RFTX_CTRLType Struct Reference

RF Transmitter Structure. More...

#include <tx_sfrs.h>

Data Fields

__IO uint8_t TXCTRL0
 
__IO uint8_t TXCTRL1
 
__IO uint8_t POWLEV
 
__IO uint8_t POWAP
 

Detailed Description

RF Transmitter Structure.

RFTX_CTRL: RF transmitter configuration STARTX: initiate an RF burst 1 => start a transmission burst with the current settings use: TXCTRL0_STARTX

NXTBURST: indicate to repeat the current burst again once the current one completes. This bit is checked at the end of each rf transmission burst. if set, then another burst is initiated automatically without needing to set STARTX again. This bit can be adjusted during transmission. 0 => transmitter will become idle after current burst 1 => transmitter will start new burst after current one. use: TXCTRL0_NXTBURST

MODUL: modulation format to use 00 => reserved 01 => BPSK use: TXCTRL0_MODUL_PSK 10 => BFSK use: TXCTRL0_MODUL_FSK 11 => ASK use: TXCTRL0_MODUL_ASK

FRAC_EN: enable fractional-N feature of PLL 0 => integer-N PLL mode 1 => fractional-N PLL mode use: TXCTRL0_FRAC_EN

TXCTRL0[2:0]: reserved. only write 3'b000

PEDES: Controls power level set during TDET3. 00 => 0x10 use: TXCTRL1_PEDES_10 01 => 0x12 use: TXCTRL1_PEDES_12 10 => 0x14 use: TXCTRL1_PEDES_14 11 => 0x16 use: TXCTRL1_PEDES_16

TPATCH[10:5]: Allows fine tuning of the time between message bursts when NXTBURST is set. Since the NWAIT parameter only allows integer number so of chip times to be set for the inter-burst waiting period this register can be used to add a small delay with finer resolution to produce the desired time. The approximate time resolution for this variable is 800ns and is unaffected by CKDIV. Note that only the MSBs of this parameter are stored in this register. The MSBs are stored in the TXTIMING register.

POWLEV: Power level for FSK, and for logic level 0 of ASK. When using FSK modulation, the output power os controlled by this register. When using ASK modulation, the power level output during the low level chips is controlled by this register. To do on-off keying ASK, set this to 0. Ignored in BPSK mode.

ASKAMP: Power level for BPSK, and for logic level 1 of ASK. Ignored in FSK mode.

Field Documentation

__IO uint8_t POWAP
__IO uint8_t POWLEV
__IO uint8_t TXCTRL0
__IO uint8_t TXCTRL1

The documentation for this struct was generated from the following file: