Herzog Library 00.00.01
rel_libdev.herzog.00.00.01.10606
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Go to the source code of this file.
Data Structures | |
union | RFRX_DATAType |
RF Receiver Structure. More... | |
struct | RFRXType |
struct | RFRX_CTRLType |
struct | RFRX_MONTRType |
union | RFRX_PLLType |
Macros | |
#define | RX_BUFF_SIZE 16 |
#define | RX_BASE (ASIC_7B_BASE + 0x20) |
RF Receiver Definition. More... | |
#define | RX_SAP_BASE (ASIC_16B_BASE + 0x1000) |
#define | TRIM_SAP_BASE (ASIC_16B_BASE + 0x8004) |
#define | RFEN 0x80 |
#define | RFOFF 0x00 |
#define | SNIFEN 0x40 |
#define | SNIFDIS 0x00 |
#define | MSGRDY 0x20 |
#define | AGCOVF 0x10 |
#define | SLICEROUT 0x02 |
#define | RFSLEEP 0x01 |
#define | LOWBPS 0x80 |
#define | NORMALBPS 0x00 |
#define | AGCEN 0x80 |
#define | AGCDIS 0x00 |
#define | ALPHA00 0x00 |
#define | ALPHA01 (0x01<<6) |
#define | ALPHA02 (0x02<<6) |
#define | ALPHA03 (0x03<<6) |
#define | BETA00 0x00 |
#define | BETA01 (0x01<<4) |
#define | BETA02 (0x02<<4) |
#define | BETA03 (0x03<<4) |
#define | FT00 0x00 |
#define | FT01 (0x01<<2) |
#define | FT02 (0x02<<2) |
#define | FT03 (0x03<<2) |
#define | SDR00 0x00 |
#define | SDR01 0x01 |
#define | SDR02 0x02 |
#define | SDR03 0x03 |
#define | PLL32 (0x00<<6) |
#define | PLL48 (0x01<<6) |
#define | PLL64 (0x02<<6) |
#define | PLL128 (0x03<<6) |
#define | RFSLEEP4 (0x00<<3) |
#define | RFSLEEP6 (0x01<<3) |
#define | RFSLEEP8 (0x02<<3) |
#define | RFSLEEP10 (0x03<<3) |
#define | RFSLEEP12 (0x04<<3) |
#define | RFSLEEP14 (0x05<<3) |
#define | RFSLEEP32 (0x06<<3) |
#define | RFSLEEP128 (0x07<<3) |
#define | WAKET8 0x00 |
#define | WAKET10 0x01 |
#define | WAKET12 0x02 |
#define | WAKET14 0x03 |
#define | WAKET16 0x04 |
#define | WAKET18 0x05 |
#define | WAKET24 0x06 |
#define | WAKET32 0x07 |
#define | RTSUP 0x00 |
#define | RTDE (0x01<<6) |
#define | RTSLICER (0x02<<6) |
#define | RTPLL (0x03<<6) |
#define | RFONEN (0x01<<5) |
#define | RFONDIS 0x00 |
#define | HISDEN 0x80 |
#define | FEN 0x40 |
#define | CPT00 0x00 |
#define | CPT01 (0x01<<4) |
#define | CPT02 (0x02<<4) |
#define | CPT03 (0x03<<4) |
#define | DIV_LO2_15 (0x00<<6) |
#define | DIV_LO2_16 (0x01<<6) |
#define | DIV_LO2_17 (0x02<<6) |
#define | DIV_LO2_18 (0x03<<6) |
#define | BBGAIN0dB (0x00<<4) |
#define | BBGAIN6dB (0x01<<4) |
#define | BBGAIN12dB (0x02<<4) |
#define | BBGAIN18dB (0x03<<4) |
#define | LNADR1K (0x01<<3) |
#define | LNADR2K (0x00<<3) |
#define | LNABIAS0uA (0x00) |
#define | LNABIAS200uA (0x01) |
#define | LNABIAS500uA (0x02) |
#define | LNABIAS700uA (0x03) |
#define | LNABIAS1mA (0x04) |
#define | LNABIAS1p2mA (0x05) |
#define | LNABIAS1p5mA (0x06) |
#define | LNABIAS1p7mA (0x07) |
#define | RFRX_DATA ((RFRX_DATAType *) (RX_BASE + 0x00)) |
RF Receiver Related Registers. More... | |
#define | RFRX ((RFRXType *) (RX_BASE + 0x10)) |
#define | RFRX_CTRL ((RFRX_CTRLType *) (RX_SAP_BASE + 0x0000)) |
#define | RFRX_MONTR ((RFRX_MONTRType *) (RX_SAP_BASE + 0x0007)) |
#define | RFRX_PLL ((RFRX_PLLType *) (TRIM_SAP_BASE + 0x00)) |
Functions | |
static __INLINE uint8_t | RX_ReadState (void) |
RF Receiver Function. More... | |
static __INLINE void | RX_SetState (uint8_t state) |
Set RF State (ON/OFF) More... | |
static __INLINE void | RX_SnifferMode (uint8_t mode) |
RF Sniffer Control (ON/OFF) More... | |
static __INLINE uint8_t | RX_MessageReady (void) |
RF Message Ready. More... | |
static __INLINE void | RX_ReinitDecoder (void) |
RF Reinit Decoder. More... | |
static __INLINE uint8_t | RX_AgcOverflow (void) |
RF ACG Overflow. More... | |
static __INLINE void | RX_BitRateControl (uint8_t rate) |
RF Bit Timing rate control. More... | |
static __INLINE uint8_t | RX_ReadBitRateControl (void) |
RF Bit Timing rate read. More... | |
static __INLINE void | RX_SetMinBitNumber (uint8_t numbits) |
Set RF Minimum number of bits. More... | |
static __INLINE uint8_t | RX_ReadMinBitNumber (void) |
Read RF Minimum number of bits. More... | |
static __INLINE void | RX_AgcControl (uint8_t mode, uint8_t trim) |
AGC control and trim. More... | |
static __INLINE void | RX_SlicerControl (uint8_t alpha, uint8_t beta, uint8_t ft, uint8_t sdr) |
Slicer control. More... | |
static __INLINE void | RX_SetPllBiasTime (uint8_t btime) |
Set time to wait for PLL bias. More... | |
static __INLINE uint8_t | RX_ReadPllBiasTime (void) |
Read time to wait for PLL bias. More... | |
static __INLINE void | RX_SetSleepTime (uint8_t stime) |
Set sleep time between sniffs. More... | |
static __INLINE uint8_t | RX_ReadSleepTime (void) |
Read sleep time between sniffs. More... | |
static __INLINE void | RX_SetWakeTime (uint8_t wtime) |
Set wake time in sniffs. More... | |
static __INLINE uint8_t | RX_ReadWakeTime (void) |
Read wake time in sniffs. More... | |
static __INLINE void | RX_SetMinTe (uint8_t minte) |
Set Min_Te timer. More... | |
static __INLINE uint8_t | RX_ReadMinTe (void) |
Read Min_Te timer. More... | |
static __INLINE void | RX_SetMaxTe (uint8_t maxte) |
Set Max_Te timer. More... | |
static __INLINE uint8_t | RX_ReadMaxTe (void) |
Read Max_Te timer. More... | |
static __INLINE void | RX_SetMinGb (uint8_t mingb) |
Set Min_Gb timer. More... | |
static __INLINE uint8_t | RX_ReadMinGb (void) |
Read Min_Gb timer. More... | |
static __INLINE void | RX_SetSnifRt (uint8_t rt, uint8_t rfall, uint8_t sniff) |
Set Sniffer mode timing. More... | |
static __INLINE uint8_t | RX_ReadAgc (void) |
Read AGC gain value. More... | |
static __INLINE void | RX_Setup0 (uint8_t rejection, uint8_t fractional, uint8_t cpt, uint8_t lfrt) |
RF Control 0. More... | |
static __INLINE void | RX_Setup1 (uint8_t lodiv, uint8_t bbg, uint8_t lnadr, uint8_t lnab) |
RF Control 1. More... | |
This file is proprietary to Indie Semiconductor. All rights reserved. Reproduction or distribution, in whole or in part, is forbidden except by express written permission of Indie Semiconductor.
#define AGCDIS 0x00 |
#define AGCEN 0x80 |
#define AGCOVF 0x10 |
#define ALPHA00 0x00 |
#define ALPHA01 (0x01<<6) |
#define ALPHA02 (0x02<<6) |
#define ALPHA03 (0x03<<6) |
#define BBGAIN0dB (0x00<<4) |
#define BBGAIN12dB (0x02<<4) |
#define BBGAIN18dB (0x03<<4) |
#define BBGAIN6dB (0x01<<4) |
#define BETA00 0x00 |
#define BETA01 (0x01<<4) |
#define BETA02 (0x02<<4) |
#define BETA03 (0x03<<4) |
#define CPT00 0x00 |
#define CPT01 (0x01<<4) |
#define CPT02 (0x02<<4) |
#define CPT03 (0x03<<4) |
#define DIV_LO2_15 (0x00<<6) |
#define DIV_LO2_16 (0x01<<6) |
#define DIV_LO2_17 (0x02<<6) |
#define DIV_LO2_18 (0x03<<6) |
#define FEN 0x40 |
#define FT00 0x00 |
#define FT01 (0x01<<2) |
#define FT02 (0x02<<2) |
#define FT03 (0x03<<2) |
#define HISDEN 0x80 |
#define LNABIAS0uA (0x00) |
#define LNABIAS1mA (0x04) |
#define LNABIAS1p2mA (0x05) |
#define LNABIAS1p5mA (0x06) |
#define LNABIAS1p7mA (0x07) |
#define LNABIAS200uA (0x01) |
#define LNABIAS500uA (0x02) |
#define LNABIAS700uA (0x03) |
#define LNADR1K (0x01<<3) |
#define LNADR2K (0x00<<3) |
#define LOWBPS 0x80 |
#define MSGRDY 0x20 |
#define NORMALBPS 0x00 |
#define PLL128 (0x03<<6) |
#define PLL32 (0x00<<6) |
#define PLL48 (0x01<<6) |
#define PLL64 (0x02<<6) |
#define RFEN 0x80 |
#define RFOFF 0x00 |
#define RFONDIS 0x00 |
#define RFONEN (0x01<<5) |
#define RFRX_CTRL ((RFRX_CTRLType *) (RX_SAP_BASE + 0x0000)) |
#define RFRX_DATA ((RFRX_DATAType *) (RX_BASE + 0x00)) |
RF Receiver Related Registers.
#define RFRX_MONTR ((RFRX_MONTRType *) (RX_SAP_BASE + 0x0007)) |
#define RFRX_PLL ((RFRX_PLLType *) (TRIM_SAP_BASE + 0x00)) |
#define RFSLEEP 0x01 |
#define RFSLEEP10 (0x03<<3) |
#define RFSLEEP12 (0x04<<3) |
#define RFSLEEP128 (0x07<<3) |
#define RFSLEEP14 (0x05<<3) |
#define RFSLEEP32 (0x06<<3) |
#define RFSLEEP4 (0x00<<3) |
#define RFSLEEP6 (0x01<<3) |
#define RFSLEEP8 (0x02<<3) |
#define RTDE (0x01<<6) |
#define RTPLL (0x03<<6) |
#define RTSLICER (0x02<<6) |
#define RTSUP 0x00 |
#define RX_BASE (ASIC_7B_BASE + 0x20) |
RF Receiver Definition.
#define RX_BUFF_SIZE 16 |
#define RX_SAP_BASE (ASIC_16B_BASE + 0x1000) |
#define SDR00 0x00 |
#define SDR01 0x01 |
#define SDR02 0x02 |
#define SDR03 0x03 |
#define SLICEROUT 0x02 |
#define SNIFDIS 0x00 |
#define SNIFEN 0x40 |
#define TRIM_SAP_BASE (ASIC_16B_BASE + 0x8004) |
#define WAKET10 0x01 |
#define WAKET12 0x02 |
#define WAKET14 0x03 |
#define WAKET16 0x04 |
#define WAKET18 0x05 |
#define WAKET24 0x06 |
#define WAKET32 0x07 |
#define WAKET8 0x00 |
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AGC control and trim.
mode | AGCEN or AGCDIS |
trim | [6...0] |
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RF ACG Overflow.
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RF Bit Timing rate control.
rate | half rate or normal: LOWBPS or NORMALBPS |
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RF Message Ready.
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Read AGC gain value.
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RF Bit Timing rate read.
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Read Max_Te timer.
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Read RF Minimum number of bits.
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Read Min_Gb timer.
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Read Min_Te timer.
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Read time to wait for PLL bias.
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Read sleep time between sniffs.
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RF Receiver Function.
RF State (ON/OFF)
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Read wake time in sniffs.
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RF Reinit Decoder.
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Set Max_Te timer.
maxte | - The value to be used to calculate the maximum time for a bit to be accepted as valid: = (1 + Min_Te + Max_Te)*(12*16)/3.58e6 |
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Set RF Minimum number of bits.
numbits | The number of bits. |
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Set Min_Gb timer.
mingb | - The value to be used to calculate the minimum time for a packet to be accepted as valid: = (1 + Min_Te + Max_Te + Min_Gb)*(12*16)/3.58e6 |
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Set Min_Te timer.
minte | - The value to be used to calculate the minimum time for a bit to be accepted as valid: = (1+Min_Te)*(12*16)/3.58e6 |
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Set time to wait for PLL bias.
btime | PLL32, PLL48, PLL64, PLL128 |
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Set sleep time between sniffs.
stime |
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Set Sniffer mode timing.
rt | - source for real-time output: RTSUP supervisor clock RTDE decimator output (serialized stream) RTSLICER slicer output RTPLL PLL_EN (high if analog blocks enabled) |
rfall | - RF always on or not (For test) RFONEN or RFONDIS |
sniff | - Number of edges to check in each sniff cycle before committing to a long wake cycle. When in sniff mode, the first SNIFF_NE edges are tested for valid timing. If any one of these first edges are badly timed, then the receiver will go to sleep. |
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Set RF State (ON/OFF)
state | The RX state, RFEN or RFOFF |
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RF Control 0.
rejection | Single side band demodulation with Weaver image |
rejection | architecture –> HISDEN = 1 = high side band; HISDDIS = 0 = Low side band I |
fractional | FEN = fractional active, FDIS = integer active |
cpt | - charge pump trim: CPT00 to CPT3 |
lfrt | - 0...15 |
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RF Control 1.
lodiv | DIV_LO2_16 to DIV_LO2_19 |
bbg | BBGAIN0dB to BBGAIN18dB |
lnadr | LNADREN or LNADRDIS |
lnab | - LNABIAS0uA to LNABIAS1p7mA |
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Set wake time in sniffs.
wtime |
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Slicer control.
alpha | |
beta | |
ft | |
sdr |
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RF Sniffer Control (ON/OFF)
mode | The sniffer mode: SNIFEN or SNIFDIS |