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Herzog Library 00.00.01
rel_libdev.herzog.00.00.01.10606
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Go to the source code of this file.
Data Structures | |
| struct | RFTX_CTRLType |
| RF Transmitter Structure. More... | |
| union | RFTX_DATAType |
| union | RFTX_MSGFMTType |
| union | RFTX_TIMINGType |
| union | RFTX_PLLType |
Macros | |
| #define | TXCTRL0_MODUL_ASK ((uint8_t) (0x03 << 4)) |
| RF Transmitter Definition. More... | |
| #define | TXCTRL0_FRAC_EN ((uint8_t) (0x01 << 3)) |
| #define | TXCTRL0_NXTBURST ((uint8_t) (0x01 << 6)) |
| #define | TXCTRL0_STARTX ((uint8_t) (0x01 << 7)) |
| #define | TXCTRL1_PEDES_10 ((uint8_t) (0x00 << 6)) |
| #define | TXCTRL1_PEDES_12 ((uint8_t) (0x01 << 6)) |
| #define | TXCTRL1_PEDES_14 ((uint8_t) (0x02 << 6)) |
| #define | TXCTRL1_PEDES_16 ((uint8_t) (0x03 << 6)) |
| #define | TXTRIM0_VAL ((uint8_t) 0x44) |
| #define | TXTRIM1_VAL ((uint8_t) 0x82) |
| #define | TX_BASE (ASIC_7B_BASE + 0x32) |
| RF Transmitter Related Registers. More... | |
| #define | RFTX_CTRL ((RFTX_CTRLType *) (ASIC_7B_BASE + 0x32)) |
| #define | RFTX_DATA ((RFTX_DATAType *) (ASIC_7B_BASE + 0x36)) |
| #define | RFTX_MSGFMT ((RFTX_MSGFMTType *) (ASIC_7B_BASE + 0x38)) |
| #define | RFTX_TIMING ((RFTX_TIMINGType *) (ASIC_7B_BASE + 0x3A)) |
| #define | RFTX_PLL ((RFTX_PLLType *) (ASIC_16B_BASE + 0x8000)) |
| #define | TXTRIM0 ((__IO uint8_t *) (ASIC_16B_BASE + 0x03)) |
| #define | TXTRIM1 ((__IO uint8_t *) (ASIC_16B_BASE + 0x0C)) |
Functions | |
| static __INLINE void | TX_StartTransmission () |
| RF Transmitter Function. More... | |
| static __INLINE void | TX_StopTransmission () |
| static __INLINE void | TX_En_NextBurst () |
| static __INLINE void | TX_Dis_NextBurst () |
| static __INLINE void | TX_TXconfig (uint8_t module, uint8_t frac_en, uint8_t peds) |
| RF TX Control. More... | |
| static __INLINE void | TX_SetPowerLevel (uint8_t powlev, uint8_t powap) |
| RF TX amplifier power. More... | |
| static __INLINE void | TX_SetTpatch (uint16_t tpatch) |
| RF TX set patch time. More... | |
| static __INLINE void | TX_SetMsgFormat (uint16_t nburst, uint8_t nwait) |
| RF TX set message format including burst bit and wait bit time. More... | |
| static __INLINE void | TX_SetChipRate (uint16_t txcdiv) |
| RF TX clock divider number chip rate = 1.25Mbps / TXCLKDIV for example, if chip rate is 3.3K, TXCDIV = 375. More... | |
| static void | TX_SetTiming (uint16_t txcdiv, uint16_t nburst, uint8_t nwait_total) |
| : given the number of wait bit time and using default TED value to calculate the value of NWAIT[5:0] and TPATCH[10:0] The details of calculation is given in the data sheet The default TED1 is set 1'b0, TED2 3'b010, TED3 3'b101, TED4 = TED5 = 5'b10100 More... | |
| static __INLINE void | TX_SetFreq () |
| : Set TX frequency The default value is for RF Freq: 433.92Mhz at XTAL Freq 30MHz. More... | |
| static __INLINE void | TX_LoadData (uint16_t data) |
This file is proprietary to Indie Semiconductor. All rights reserved. Reproduction or distribution, in whole or in part, is forbidden except by express written permission of Indie Semiconductor.
| #define RFTX_CTRL ((RFTX_CTRLType *) (ASIC_7B_BASE + 0x32)) |
| #define RFTX_DATA ((RFTX_DATAType *) (ASIC_7B_BASE + 0x36)) |
| #define RFTX_MSGFMT ((RFTX_MSGFMTType *) (ASIC_7B_BASE + 0x38)) |
| #define RFTX_PLL ((RFTX_PLLType *) (ASIC_16B_BASE + 0x8000)) |
| #define RFTX_TIMING ((RFTX_TIMINGType *) (ASIC_7B_BASE + 0x3A)) |
| #define TX_BASE (ASIC_7B_BASE + 0x32) |
RF Transmitter Related Registers.
| #define TXCTRL0_FRAC_EN ((uint8_t) (0x01 << 3)) |
| #define TXCTRL0_MODUL_ASK ((uint8_t) (0x03 << 4)) |
RF Transmitter Definition.
| #define TXCTRL0_NXTBURST ((uint8_t) (0x01 << 6)) |
| #define TXCTRL0_STARTX ((uint8_t) (0x01 << 7)) |
| #define TXCTRL1_PEDES_10 ((uint8_t) (0x00 << 6)) |
| #define TXCTRL1_PEDES_12 ((uint8_t) (0x01 << 6)) |
| #define TXCTRL1_PEDES_14 ((uint8_t) (0x02 << 6)) |
| #define TXCTRL1_PEDES_16 ((uint8_t) (0x03 << 6)) |
| #define TXTRIM0 ((__IO uint8_t *) (ASIC_16B_BASE + 0x03)) |
TXTRIM0 - reserved, only ever write 0x44 TXTRIM1 - reserved, only ever write 0x82
| #define TXTRIM0_VAL ((uint8_t) 0x44) |
| #define TXTRIM1 ((__IO uint8_t *) (ASIC_16B_BASE + 0x0C)) |
| #define TXTRIM1_VAL ((uint8_t) 0x82) |
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RF TX clock divider number chip rate = 1.25Mbps / TXCLKDIV for example, if chip rate is 3.3K, TXCDIV = 375.
| txcdiv | 0 - 2047 |
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: Set TX frequency The default value is for RF Freq: 433.92Mhz at XTAL Freq 30MHz.
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RF TX set message format including burst bit and wait bit time.
| nburst | 0 - 1023 |
| nwait | 0 - 63 |
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RF TX amplifier power.
| powlev | 0 - 127 |
| powap | 0 - 127 |
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: given the number of wait bit time and using default TED value to calculate the value of NWAIT[5:0] and TPATCH[10:0] The details of calculation is given in the data sheet The default TED1 is set 1'b0, TED2 3'b010, TED3 3'b101, TED4 = TED5 = 5'b10100
| txcdiv | 0 - 2047 |
| nburst | 0 - 1023 |
| nwait_total | 0 - 63 (here nwait is total bit time between two bursts) |
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RF TX set patch time.
| tpatch | patch time |
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RF Transmitter Function.
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RF TX Control.
| module | TXCTRL0_MODUL_ASK = select ASK module |
| frac_en | TXCTRL0_FRAC_EN = enable fractionall PLL |
| peds | pedestral time TXCTRL1_PEDES_10 TXCTRL1_PEDES_12 TXCTRL1_PEDES_14 TXCTRL1_PEDES_16 |
1.8.9.1